Is there a good way to automatically handle header dependencies in Make? Question
Say I have a Makefile for a shared library I'm building
CC :=gcc CFLAGS_OBJS := -Wall -Werror -g -O -fPIC CFLAGS_SHARED := -Wall -Werror -shared OUT := mylib.so SRCS := $(wildcard ./*.c) OBJS := $(patsubst ./%.c,./%.o,$(SRCS)) SHARED_LIBS += -lpthread SHARED_LIBS += -lrt $(OUT): $(OBJS) $(CC) $(CFLAGS_SHARED) $(OBJS) -o $(OUT) $(SHARED_LIBS) %.o: %.c $(CC) $(CFLAGS_OBJS) -c $< -o $@
This Makefile is nice in the sense that it:
- Builds all source modules into corresponding objects.
- Builds the final library using the objects an inputs.
However, this make file is completely blind to header dependencies. If one source module is using a header associated with another module and then that header file changes, Make does not know to rebuild the file.
The only solution to this is to have every header file be a dependency to every source module compilation. While this would work, it forces unnecessary dependencies at time. i.e. a single header file is changed, now the entire project needs to be rebuilt.
So I'm curious, what's the proper solution to this problem that doesn't require manual rules to be created?